The present invention relates to a semiconductor device provided with a decimation filter that performs predetermined filtering processing on a signal sampled at a predetermined sampling rate, and converts this signal to a signal based on a required sampling rate to thereby output the resulting signal. More particularly, the present invention relates to a technique effectively applied to a decimation filter capable of changing the required sampling rate.
The decimation filter is a circuit including a function to down-sample a signal over-sampled by a clock signal having an extremely high frequency, and a low-pass filter (LPF) function to cut off an alias noise generated in downsampling. The decimation filter is applied to, for example, a delta sigma A/D converter.
Japanese Patent Laid-Open No. 5-299973 (Patent Document 1) and Japanese Patent Laid-Open No. 2005-318304 (Patent Document 2) each disclose the circuit configuration of a conventional decimation filter. Patent Document 1 discloses a decimation filter that is constituted by two blocks in order to perform filtering processing divided into two stages. Patent Document 2 discloses a decimation filter that is realized without using a multiplier.
Moreover, Japanese Patent Laid-Open No. 7-183814 (Patent Document 3), Japanese Patent Laid-Open No. 2009-207236 (Patent Document 4) and Japanese Patent Laid-Open No. 2008-219560 (Patent Document 5) each disclose a related art for making the characteristic of a filter variable. Patent Document 3 discloses a method of preparing three types of coefficient ROMs, in which a filter coefficient in a decimation filter is stored, and modifying a transfer function by switching the three-types of coefficient ROMs. Patent Document 4 discloses a method, in which the filter coefficient of a variable characteristic digital filter is made variable based on a motor operating current and a motor operating voltage or on the output value of the variable characteristic digital filter so as to obtain a filter characteristic optimum for detection of a ripple in a ripple detection device for a motor. Patent Document 5 discloses a method of changing a decimation ratio by changing the methods of reading a sample from a buffer memory temporarily storing a first signal (sample) sampled at a first sampling frequency.